1. Field of the Invention
The present invention relates to a reflection-transmission type liquid crystal display device and a method for manufacturing the same, and more particularly to a reflection-transmission type liquid crystal display device and a method for manufacturing the same in which a pad electrode is formed with the same layer as in a transparent electrode to enhance the pad reliability.
2. Description of the Related Art
Among flat panel devices, liquid crystal display (LCD) devices have been widely utilized for various electronic devices because the LCD devices are light, thin, have low power dissipation, and are capable of displaying a high quality image.
LCD devices generally comprise transmission, reflection, and reflection-transmission types. The transmission type LCD device displays information by using a light source such as a backlight. The reflection type LCD device displays information by using natural light. The reflection-transmission type LCD device operates in a transmission mode for displaying an image using a built-in light source when needed, such as in a dark room where a light source is not available, and operates in a reflection mode at other times for displaying the image by reflecting incident light.
At present, thin film transistor-liquid crystal display devices (TFT-LCDs) are widely used. The TFT-LCD has a structure that two substrates respectively having electrodes are provided and a thin film transistor (TFT) for switching a voltage applied to the electrodes is generally formed in a pixel region of one of the substrates.
FIGS. 1A to 1C are cross-sectional views showing a conventional reflection-transmission type liquid crystal display device. In FIGS. 1A to 1C, the reflection-transmission type liquid crystal display device is an amorphous silicon type TFT-LCD having a bottom-gate structure. FIG. 1A shows a display region of the liquid crystal display device where a thin film transistor 15 is formed. FIG. 1B and FIG. 1C show a gate pad region and a data pad region of the liquid crystal display device, respectively.
Referring to FIGS. 1A to 1C, after depositing a first metal layer on a substrate 10 composed of insulating material such as glass, quartz, or sapphire, the first metal layer is patterned by a photolithography process using a first mask to form a gate wiring. The gate wiring includes a gate line (not shown) extending in a first direction, a gate electrode 12 branched from the gate line and a gate pad 11 connected to the end of the gate line for applying a scanning voltage to the gate electrode 12.
A gate insulation layer 14 composed of silicon nitride is formed on the substrate 10 on which the gate wiring is formed, and then, an amorphous silicon layer and an n+ doped amorphous silicon layer are successively formed on the gate insulation layer 14. Subsequently, the amorphous silicon layer and the n+ doped amorphous silicon layer are patterned by a photolithography process using a second mask to form an active pattern 16 and an ohmic contact pattern 18. Thus, the active pattern 16 is composed of amorphous silicon and the ohmic contact pattern 18 is made of n+ doped amorphous silicon.
After depositing a second metal layer on the ohmic contact pattern 18 and the gate insulation layer 14, the second metal layer is patterned through a photolithography process using a third mask to form a data wiring. The data wiring includes a data line (not shown) extended in a second direction perpendicular to the first direction, source/drain electrodes 20 and 22 branched from the data line and a data pad connected to the end of the data line for applying an image voltage to the source electrode 20.
Then, a portion of the ohmic contact pattern 18 exposed between the source electrode 20 and the drain electrode 22 is dry-etched away to form a channel region of the thin film transistor.
After forming an inorganic passivation layer 25 on the data wiring and the gate insulation layer 14, a portion of the inorganic passivation layer 25 on the drain electrode 22 is removed by a photolithography process using a fourth mask. Here, pad contact holes 33 and 35 exposing the gate pad 11 and the data pad 19 are simultaneously formed.
After forming an organic passivation layer 26 on the entire surface of the resultant structure, a portion the organic passivation layer 26 on the drain electrode 22 and the pad regions is removed by exposure and develop processes using a fifth mask, thereby forming a first contact hole 28 exposing the drain electrode 22. At the same time, a plurality of grooves for scattering a light are formed in the surface of the organic passivation layer 26 using a sixth mask. That is, the first contact hole 28 and the grooves are simultaneously formed by two exposure processes using two masks and by one developing process.
After depositing a transparent conductive layer composed of indium tin oxide (ITO) or indium zinc oxide (IZO) on the resultant structure, the transparent conductive layer is patterned by a photolithography process using a seventh mask, thereby forming a transparent electrode 30 connected to the drain electrode 22 through the first contact hole 28.
A buffer layer 32 composed of inorganic material such as silicon nitride is formed on the entire surface of the resultant structure including the transparent electrode 30, and then, the buffer layer 32 is etched away by a photolithography process using an eighth mask to form a second contact hole 34 partially exposing the drain electrode 22.
After depositing a reflective layer composed of metal having high reflectivity such as aluminum-neodymium (Al—Nd) on the second contact hole 34 and the buffer layer 32, the reflective layer is patterned by photolithography process using a ninth mask to form a reflective electrode 36 connected to the drain electrode 22 through the second contact hole 34. The reflective electrode 36 has a transmission window T1 exposing the underlying transparent electrode 30. At the same time, a gate pad electrode 38 and a data pad electrode 40 are formed. The gate pad electrode 38 and the data pad electrode 40 are connected to the gate pad 11 and the data pad 19, respectively.
According to the conventional method, the reflection-transmission type amorphous silicon type thin film transistor-liquid crystal display device is manufactured using nine masks. At that time, the buffer layer 32 composed of silicon nitride is formed between the transparent electrode 30 and the reflective electrode 36 to prevent a galvanic corrosion generated due to a direct contact between the transparent electrode 30 and the reflective electrode 36. In particular, when the transparent electrode 30 is a bottom layer of a multilayered pixel electrode, an insulation layer should be interposed between the transparent electrode 30 and the reflective electrode 36 so as to prevent the reflective electrode 36 from being lifted due to a voltage difference between the transparent electrode 30 and the reflective electrode 36 during the development of a photoresist layer for patterning the reflective electrode 36. Hence, the manufacturing process is more complicated because an additional photolithography process is needed for etching the insulating layer to form the contact hole connecting the reflective electrode 36 to the thin film transistor.
Also, the buffer layer 32 must be formed by a low temperature chemical vapor deposition (CVD) method since the buffer layer 32 is positioned over the organic passivation layer 26. Furthermore, metals may be corroded during a subsequent chip on glass (COG) bonding process because the pad electrodes 38 and 40 are formed from the same layer as in the reflective electrode 36.
In the pixel electrode having the transparent electrode as the bottom electrode, the buffer layer can be formed by using organic material instead of using silicon nitride to prevent the metal corrosion and the lifting of the reflective electrode. However, such process is complicated since at least one mask is required for patterning the buffer layer. In addition, a reflectivity of the reflective electrode is decreased and the buffer layer is hardly patterned because the organic buffer layer is positioned over the organic passivation layer. Furthermore, metals are corroded during subsequent COG bonding process since the pad electrodes and the reflective electrode are formed from the same layer.
FIGS. 2A to 2C are cross-sectional views illustrating another conventional reflection-transmission type liquid crystal display device. In FIGS. 2A to 2C, the reflection-transmission type liquid crystal display device has a structure in which a transparent electrode is directly contacted with a reflective electrode. FIG. 2A shows a display region of the liquid crystal display device where a thin film transistor 55 is formed. FIG. 2B and FIG. 2C show a gate pad region and a data pad region of the liquid crystal display device, respectively.
Referring to FIGS. 2A to 2C, after depositing a first metal layer on a substrate 50 composed of insulating material such as glass, the first metal layer is patterned by a photolithography process using a first mask to form a gate wiring. The gate wiring includes a gate line (not shown) extended in a first direction, a gate electrode 52 branched from the gate line and a gate pad 51 connected to the end of the gate line for applying a scanning voltage to the gate electrode 52.
A gate insulation layer 54 composed of silicon nitride is formed on the substrate 50 on which the gate wiring is formed, and then, an amorphous silicon layer and an n+ doped amorphous silicon layer are successively formed on the gate insulation layer 54. Subsequently, the amorphous silicon layer and the n+ doped amorphous silicon layer are patterned by a photolithography process using a second mask to form an active pattern 56 composed of amorphous silicon and an ohmic contact pattern 58 composed of n+ doped amorphous silicon.
After depositing a second metal layer on the ohmic contact pattern 58 and the gate insulation layer 54, the second metal layer is patterned by a photolithography process using a third mask to form a data wiring. The data wiring includes a data line (not shown) extended in a second direction perpendicular to the first direction, source/drain electrodes 60 and 62 branched from the data line and a data pad connected to the end of the data line for applying a image voltage to the source electrode 60. Successively, a portion of the ohmic contact pattern 58 exposed between the source electrode 60 and the drain electrode 62 is dry-etched away to form a channel region of the thin film transistor.
After forming an inorganic passivation layer 65 on the data wiring and the gate insulation layer 54, a portion of the inorganic passivation layer 65 on the drain electrode 62 is removed by a photolithography process using a fourth mask. Here, pad contact holes 69 and 71 for exposing the gate pad 51 and the data pad 59 are formed at the same time. After forming an organic passivation layer 66 on the entire surface of the resultant structure, the organic passivation layer 66 is patterned by an exposure process and a develop process using a fifth mask and a sixth mask, thereby simultaneously forming a contact hole 68 exposing the drain electrode 62 and a plurality of grooves.
After depositing a reflective layer composed of metal having high reflectivity such as aluminum-neodymium (Al—Nd) on the resultant structure, the reflective layer is patterned by photolithography process using a seventh mask to form a reflective electrode 70, a gate pad electrode 74, and a data pad electrode 76. The reflective electrode 70 is connected to the drain electrode 62 through the contact hole 68. The gate pad electrode 74 and the data pad electrode 76 are connected to the gate pad 51 and the data pad 59 through the contact holes 69 and 71, respectively.
Subsequently, after depositing a transparent conductive layer composed of IZO on the reflective electrode 70, the transparent conductive layer is patterned by a photolithography process using an eighth mask to form a transparent electrode 72 being directly in contact with the reflective electrode 70. Here, a region having the transparent electrode 72 and not having the reflective electrode 70 forms a transmission window T2.
According to the above-described method, one mask can be omitted during the manufacturing process in comparison with the conventional method of FIG. 1 because the transparent electrode 72 is directly in contact with the reflective electrode 70 without a buffer layer. Also, the lifting of the reflective electrode 70 cannot occur since the transparent electrode 72 is positioned as a top layer. However, a galvanic corrosion between the reflective electrode 70 and the transparent electrode 72 is generally developed. Further, when the transparent electrode 72 is composed of IZO, the transparent electrode 72 and the reflective electrode 70 are not simultaneously patterned because the IZO reacts with an aluminum etchant or a chrome etchant. In addition, the transparent electrode 72 should be positioned as the top electrode to directly contact with the reflective electrode 70 and the transparent electrode 72.